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        Fiesta® 
          CSMT Finite State Machine Editor 
        Benefits 
          Key Features 
          Specifications 
          Platfoms 
          
        Fiesta® 
          CSMT is a graphical editor for finite state machines. This tool saves 
          time by allowing rapid and easy definition of state machines and automatically 
          generating Verilog® code and documentation. The tool provides a 
          Graphical User Interface (GUI) that lets users add states, transitions, 
          expressions, input and output signals to a state machine. The GUI provides 
          easy drawing of state machine diagrams.  
         
          
        Benefits 
         
          
            - Intuitive 
              Graphical User Interface speeds adoption
 
            - Saves 
              time by automatically generating Verilog code, diagrams and documentation
 
            - Speeds 
              up design realization time by automatically detecting errors
 
            - Minimizes 
              overhead by integrating directly with version control / release 
              management tools
 
            - Saves 
              design debug time by automatically embedding entity descriptions 
              in tool outputs
 
               
               
           
         
        Key 
          Features 
         
          
            - Easy 
              to use Graphical User Interface
 
            - Automatically 
              generates Verilog HDL code
 
            - Automatically 
              generates diagrams in Postscript and Window Metafile formats
 
            - Direct 
              integration into version control/release management tools like cvs 
              and make
 
            - Built 
              in Design Rule Check
 
            - Automatically 
              embeds entity description as comments in Verilog code
 
            - Automatically 
              includes entity description in documentation
 
               
                
           
         
        Specifications 
        
         
          Inputs 
         
        
        
          -  
            
Outputs 
           
          -  
            
Verilog 
              code for state machine 
           
          -  
            
State 
              machine diagram: .PS, .WMF 
           
          -  
            
Diagrams 
              and Tables: .HTML, .RTF 
               
                
           
         
        Platforms 
         
           
             
              
                 
                  |  
                     OS 
                   | 
                   
                     Version 
                   | 
                 
                 
                  | Solaris 
                    (sparc) | 
                  2.7 
                    / 2.8 (7/8) | 
                 
                 
                  | Redhat 
                    Linux | 
                  7.1 
                    / 7.2 | 
                 
                 
                  | Windows 
                     | 
                  NT4.0 
                    / 98 / 2000 / XP | 
                 
               
             
           
         
       
        
        
      © 
        Copyright Comit Systems, Inc. Fiesta is a registered trademark of Comit 
        Systems, Inc. CACT, CWGT, CRST, CSMT, CVXT, CMMT, CSGT and CMBT are trademarks 
        of Comit Systems, Inc. All other trademarks acknowledged as property of 
        their respective trademark holders. 
     | 
     
             
            Industrial-strength 
            toolkit proven at Comit 
            Contract Engineering  
            Center 
         
            Sppeds up 
            design realization 
         
            Minimizes version-control 
            overheads 
              
            Automatically embeds 
            entity descriptions 
                 
            Built in  
            Design Rule Check 
         
             
        
        
       
         
      
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